Semiconductor Conclave
The Department of Electronics Engineering (VLSI Design and Technology) at Dr. Mahalingam College of Engineering and Technology (MCET), Pollachi, organized the “Semiconductor Conclave” on 29th and 30th September 2026 at the New Seminar Hall, in association with the Chips to Startup Programme. The two-day conclave brought together distinguished speakers, industry professionals, researchers, academicians, and students to explore the evolving landscape of semiconductor technology, innovation, and design. The programme featured keynote and leadership sessions, technical and industry panel discussions, student presentations, and the release of a fabricated chip, providing participants with valuable exposure to the semiconductor ecosystem. The key takeaways of the conclave included insights into semiconductor fabrication, open-source digital tools, Edge AI, and emerging semiconductor design trends. A major focus of the programme was to encourage students to utilize open-source EDA tools and OpenPDK platforms such as IHP and GlobalFoundries (GF) to gain practical chip-design experience and complete at least one end-to-end design during their academic study period. The conclave aimed to strengthen students understanding of semiconductor design and fabrication while inspiring them to learn, connect, innovate, and contribute to India’s growing semiconductor ecosystem.
Getting Started – Renesas QuickConnect
The Department of Electronics Engineering (VLSI Design and Technology) at Dr. Mahalingam College of Engineering and Technology (MCET), Pollachi, organized a hands-on workshop titled “Getting Started – Renesas QuickConnect” on 24th August 2026 at the FPGA Design Lab. The workshop provided students with valuable practical exposure to the Renesas development environment, IDE, and development board. The session focused on installation and basic setup of the required software tools, project creation, device configuration, code development, compilation, and programming workflow. As part of the hands-on activity, students created and executed a basic LED Blink project using the development environment. They learned to build the project, program it onto the Renesas development board, and verify the LED blinking operation.
Career Awareness Session on “Silicon Spark – Igniting Ideas in VLSI
The Department of Electronics Engineering (VLSI Design and Technology), at Dr. Mahalingam College of Engineering and Technology (MCET), Pollachi, organized a Career Awareness Session on “Silicon Spark – Igniting Ideas in VLSI” on 16th September 2026 at the EEE Seminar Hall for the students. The session was conducted by Ms. Gayathree K, Assistant Professor (SS), Electronics Engineering (VLSI Design and Technology), with the objective of providing students with awareness about diverse career opportunities and pathways in the VLSI domain.From 10:00 AM to 1:00 PM, the session provided an overview of various career pathways available to VLSI graduates, including Core VLSI, Embedded Systems, FPGA, Software/IT, Semiconductor Industries, Higher Studies, Research, Government/R&D, Entrepreneurship, and Academia. Students were introduced to major VLSI domains such as RTL Design, Functional Verification, DFT, Physical Design, Static Timing Analysis (STA), Analog and Mixed-Signal Design, and Semiconductor Testing, along with the relevant subjects, technical skills, and industry tools required for each domain. The session also highlighted opportunities for pursuing M.E./M.Tech, M.S., MBA, and Ph.D. and encouraged students to identify their areas of interest, develop relevant technical skills, undertake projects and internships, and plan their career pathways systematically. Overall, the “Silicon Spark – Igniting Ideas in VLSI” session provided students with valuable insights into the VLSI industry and higher education opportunities, helping them gain a clearer understanding of the skills and career options available in the rapidly evolving semiconductor and VLSI field.
Knowledge-Sharing Session on "Digital Electronics"
The Department of Electronics Engineering (VLSI Design and Technology), at Dr. Mahalingam College of Engineering and Technology (MCET), Pollachi, organized a Knowledge-Sharing Session on "Digital Electronics" on 11th September 2026 at A415 for the third-year students. The session was conducted by senior students Rubetha and Indiravarman, with the objective of strengthening students' fundamental knowledge and understanding of important concepts in Digital Electronics.From 9:00 AM to 11:00 AM, Rubetha covered Boolean Algebra, Number Systems, Logic Gates, and Implementation of Logic Gates. From 11:00 AM to 1:00 PM, Indiravarman handled Combinational Circuits, covering Multiplexer (MUX), Decoder, Half Adder, Full Adder, and related concepts. The sessions were conducted systematically, helping students strengthen their understanding of digital logic fundamentals and combinational circuit concepts. An assessment was conducted from 2:30 PM to 4:30 PM based on the topics covered during the morning sessions to evaluate the students' understanding and retention. Overall, the knowledge-sharing session provided the third-year students with a valuable peer-learning experience and helped them reinforce their academic knowledge in Digital Electronics through interactive sessions and assessment.
Internal Hackathon
The Department of Electronics Engineering (VLSI Design and Technology), in association with the SRC of EE (VLSI Design and Technology) and the Department of Electronics and Communication Engineering (ECE), at Dr. Mahalingam College of Engineering and Technology (MCET), Pollachi, conducted the Smart India Hackathon 2026 – Internal Hackathon on 3rd September 2026 at C401-B (Department Library). The event was organized to provide students with a platform to transform innovative ideas into practical solutions for real-world challenges through creativity, teamwork, and technological implementation.The internal hackathon was conducted with the theme “Innovate. Implement. Impact.”, encouraging students to develop innovative and application-oriented solutions. The event featured an expert panel comprising Mr. Guru Aswath Gurunathan, Managing Director / Founder, HASHh Automations; Dr. R. S. Venkatesan, AP (SG), ECE; Mr. Gnanaprakasam D, AP (SS), EEE; and Dr. M. Sathimohan, Associate Professor, VLSI Design. The panel members interacted with the participating teams, reviewed their ideas and implementations, and provided valuable technical insights and guidance to strengthen their proposed solutions.
Know Your Department
The Department of Electronics Engineering (VLSI Design and Technology) at Dr. Mahalingam College of Engineering and Technology (MCET), Pollachi, organized "Know Your Department" a welcome event for the 2026-2030 batch EE (VLSI) students, on 31st August 2026 at A413. The event was organized in association with Silittron Association. The session began with a warm and inviting tone for the new batch. Dr. N. Saravanakumar, Professor & HoD of EE (VLSI), delivered the HoD's address, welcoming students into the department and sharing insights into the journey ahead. This was followed by faculty introductions and talks, giving students the opportunity to know the mentors and educators who would guide them through their academic journey in VLSI Design and Technology. This was followed by an engaging student interaction session, allowing the new batch to connect with faculty and senior students, ask questions, and get a feel for campus life. This helps students to aware of department.
A Demo Session on "Visual TCAD"
The Department of Electronics Engineering (VLSI Design and Technology), in association with the Silittron Association, at Dr. Mahalingam College of Engineering and Technology (MCET), Pollachi, organized A Demo Session on "Visual TCAD" on 2nd September 2026 at C404. The session was conducted with the theme "Simulate, Analyze, Innovate," offering students, research scholars, and faculty members valuable exposure to next-generation tools for device simulation, semiconductor process modeling, and advanced analysis. The session covered Visual TCAD device drawing in 2D and 3D, Scripting, Process simulation, Layout driven method along with the entire CWB flow, giving participants a comprehensive understanding of the platform's capabilities. Through live demonstration, attendees explored advanced simulation techniques, process modeling methods to represent semiconductor fabrication steps with precision, and powerful analysis tools to extract insights and optimize device performance. This interactive session allowed participants to engage directly with the platform and interact with experts, exploring how Visual TCAD supports research and development in semiconductor device design.
Inaugurated - SILITTRON
The Department of Electronics Engineering (VLSI Design and Technology) at Dr. Mahalingam College of Engineering and Technology (MCET), Pollachi, inaugurated its Department Association, SILITTRON, on 12th August 2026 at the CS Hall. The inaugural ceremony was graced by Mr. E. Vijayakumar, Senior Technical Director, SiMaxTech Pvt. Ltd., Bengaluru, as the Chief Guest. The programme commenced with a prayer song and lamp lighting, followed by the welcome address, presidential address, introduction of members. The Chief Guest was formally introduced and honoured as part of the inaugural ceremony.
The highlight of the event was the interactive guest session led by Mr. E. Vijayakumar, which provided students with an opportunity to engage directly with an industry expert and gain valuable insights into the VLSI industry, career opportunities, industry expectations, and professional development. The interactive nature of the session encouraged students to actively participate, raise questions, and gain practical perspectives from industry. The event also included the distribution of offer letters to students, making the occasion a meaningful platform for celebrating student achievements and strengthening industry–academia interaction. The inauguration of SILITTRON marked an important beginning for the department association, motivating students to enhance their technical knowledge, professional skills, and industry readiness.

Tech Talk for the current II- and III-year VLSI students
Dr. Mahalingam College of Engineering and Technology (MCET), Pollachi, through the Department of Electronics Engineering (VLSI Design and Technology), organized a Tech Talk for the current II- and III-year VLSI students, was conducted from 3rd August 2026 to 6th August 2026, from 9:30 AM to 4:30 PM in the Electrical Seminar Hall by the final year VLSI students who were successfully placed at SIMAX Technologies Pvt. Ltd.The session aimed to provide students with valuable insights into the VLSI industry and enhance their understanding of industry-relevant concepts and technologies. The speakers covered the fundamental concepts of Analog Electronics, IC Design, Layout and Fabrication, TCL Programming, System Verilog, and Universal Verification Methodology (UVM). In addition to the technical aspects, the final year students shared their placement experiences and offered useful career guidance to the II- and III-year students. The event served as an excellent platform for knowledge sharing and interaction between senior and junior students, helping the participants gain a better understanding of the VLSI domain, industry expectations, and potential career opportunities. Overall, the technical talk was informative and beneficial, motivating the students to strengthen their technical skills and prepare themselves for successful careers in the VLSI industry.

Two days’ workshop on FPGA Development Using Vitis and Adaptive SoCs
Dr. Mahalingam College of Engineering and Technology (MCET), Pollachi, Through the Department of Electronics Engineering (VLSI Design and Technology), organized a Two days’ workshop on FPGA Development Using Vitis and Adaptive SoCs on 10th and 11th July 2026 from 9:30 A.M to 4:30 P.M at B306(FPGA Laboratory). The session was delivered by R. Siva Subramanian, Application Engineer Microelectronics, Bengaluru. He delivered students to FPGA design using Vitis unified software platform, Adaptive SoC architecture, and Hardware -Software Co-design Concepts. The lecture highlighted real-time applications in AI, Embedded systems, and high-performance computing into modern FPGA development Technologies.

Guest Lecture on Layout Optimization Techniques
Dr. Mahalingam College of Engineering and Technology (MCET), Pollachi, through the Department of Electronics Engineering (VLSI Design and Technology), organized a Guest Lecture on Layout Optimization Techniques on 20th June 2026 from 9:30 AM to 5:00PM. The session was delivered by Mr.Karthikraja P, Lead Engineer Simax Tech pvt lmt, provided valuable insights into layout optimization techniques used in VLSI design. The resource person shared expertise on the importance of efficient layout design, optimization strategies, and industry practices for achieving high-performance, low-power, and area-efficient integrated circuits. The lecture covered key topics such as layout planning, design rule considerations, parasitic effects, routing optimization, area minimization, power optimization, and verification techniques. The session was highly informative and beneficial, helping students understand the practical aspects of physical design and motivating them to enhance their skills in VLSI layout design. The event witnessed active participation from 50 students and faculty members of the VLSI Department.

Guest Lecture on “System Verilog and UVM
Dr. Mahalingam College of Engineering and Technology, Pollachi, through the Department of Electronics Engineering (VLSI Design and Technology) in association with the Silitron Association, successfully organised a Valedictory Function and Guest Lecture on “System Verilog and UVM” on 18th April 2026. The session was conducted at the Electrical Seminar Hall and was attended by students of VLSI design and technology. The resource person, Mr. M. Vinith Rahul, Design Verification Engineer at Mobiveil Technologies, Chennai, delivered an insightful lecture focusing on industry practices in SystemVerilog and UVM methodologies. The session provided students with practical exposure to verification concepts, enhancing their understanding of modern chip design verification techniques.

Guest Lecture on Research Paper Writing
Dr. Mahalingam College of Engineering and Technology (MCET), Pollachi, through the Department of Electronics Engineering (VLSI Design and Technology), organized a Guest Lecture on Research Paper Writing on 13th March 2026 from 9:30 AM to 4:30 PM at the Electrical Seminar Hall. The session was delivered by Dr. K. Sakthipandi, Professor, who provided valuable insights into research methodologies and the process of publishing research papers. He shared his expertise in materials science, nanomaterials, and sustainable technologies, and highlighted the importance of quality research, originality, proper citation practices, and ethical standards. The lecture covered key aspects such as selecting a research topic, structuring a research paper, and submitting work to reputed journals and conferences. The session was highly beneficial, motivating students to develop an interest in research and academic publishing, while also guiding students who had completed research work to convert it into publishable papers. The event witnessed active participation from 70 students and faculty members from VLSI Department .

IC Design Essentials: Modeling, RTL, Verification, and Layout
Dr. Mahalingam College of Engineering and Technology (MCET), Pollachi, through the Department of Electronics Engineering (VLSI Design and Technology), successfully organized a Five-Day Short Term Training Program titled “IC Design Essentials: Modeling, RTL, Verification, and Layout” from 2nd to 6th March 2026. The program provided comprehensive exposure to the complete VLSI design flow, including CMOS fundamentals, device modeling with emphasis on GaN devices, System Verilog enhancements, UVM-based verification methodologies, analog IC layout techniques, FPGA workflows, and regulator and amplifier design concepts. The sessions were delivered by distinguished academicians and industry experts including Dr. N. Ramkumar (SR University), Dr. N. Saravanakumar (HoD/EE VLSI, Professor, Principal Investigator of C2S Project at Dr. Mahalingam College of Engineering and Technology), and Mr. Talluri Vineel Jessy (Research Associate, C2S Project at Dr. Mahalingam College of Engineering and Technology). The program witnessed active participation from faculty members, II VLSI, III VLSI and external student participants , making it a successful and enriching learning experience.

SILITTRON Association - Project Expo
Dr. Mahalingam College of Engineering and Technology (MCET), Pollachi, through the Department of Electronics Engineering (VLSI Design and Technology) and the SILITTRON Association, organized an event titled “Project Expo” for the III Year Electronics Engineering students on 12 March 2026.
The event aimed to encourage students to present their project ideas and prototypes, thereby enhancing their creativity, problem-solving ability, and technical knowledge. A total of 19 teams comprising 60 students actively participated and showcased their projects across various domains related to electronics, VLSI design, and emerging technologies.
The presentations were evaluated based on originality, technical implementation, clarity of presentation, and potential societal impact. The session provided a valuable platform for students to demonstrate their innovative work and technical skills, while also receiving constructive feedback from the evaluation panel.
The event successfully motivated students to pursue research and project development in their respective areas of interest.
Cash prizes were awarded to the winning teams in recognition of their outstanding project presentations.
• 1st Prize: Rs. 1,500
• 2nd Prize: Rs. 1,000
• 3rd Prize: Rs. 750
The program concluded with appreciation for all the participants for their enthusiasm, innovation, and active participation, making the event a successful and enriching experience for the students.

Innovative Idea Presentation – Technoconference 2026
Dr. Mahalingam College of Engineering and Technology (MCET), Pollachi, through the Department of Electronics Engineering (VLSI Design and Technology) and the SILITTRON Association, organized an event titled “Innovative Idea Presentation – Technoconference 2026” for the II Year Electronics Engineering students on 06 March 2026.
The event aimed to encourage students to present innovative ideas and enhance their creativity, problem-solving ability, and technical knowledge. A total of 18 teams comprising 60 students actively participated and presented their innovative ideas across various domains related to engineering and emerging technologies.
The presentations were evaluated based on originality, feasibility, clarity of presentation, and potential societal impact. The session provided a valuable platform for students to showcase their innovative thinking and receive constructive feedback from the evaluation panel.
The event successfully motivated students to explore research-oriented thinking and project development in their respective fields.
Cash prizes were awarded to the winning teams in recognition of their innovative ideas and effective presentations.
• 1st Prize: Rs. 1,500
• 2nd Prize: Rs. 1,000
• 3rd Prize: Rs. 750
The program concluded with appreciation for all the participants for their enthusiasm, creativity, and active involvement, making the event a successful and enriching experience for the students.

Innovate Your Chip Design Skills through Hands-on Semi-Custom IC Design
Dr.Mahalingam College of Engineering and Technology, Pollachi, through the Department of Electronics Engineering (VLSI Design and Technology) and the Silitron Association, successfully organised a two-day workshop titled “Innovate Your Chip Design Skills through Hands-on Semi-Custom IC Design” for Second Year VLSI students. The sessions were conducted by Mr. V. Rajkumar, Lead Solution Architect, Sinetec Technologies, Coimbatore, who provided valuable insights into semi-custom ASIC design flow and industry-oriented VLSI methodologies. The programme was held on 16 and 17 February 2026 at C-426 & Mechanical Seminar Hall, significantly enhancing the practical chip design skills of the participating students.

Automated Layout Optimization Techniques
Dr. Mahalingam College of Engineering and Technology, Pollachi, through the Department of Electronics Engineering (VLSI Design and Technology) and the Silittron Association, is organising a two-day workshop titled “Automated Layout Optimization Techniques” as part of its academic enrichment initiatives. The sessions will be handled by Mr. P. Karthikraja, Lead Engineer, SiMaxTech Pvt. Ltd., Bengaluru, along with Mr. Talluri Vineel Jessy, Research Associate III, and Ms. M. Manjubala, Junior Research Fellow from the C2S Project, Dr. Mahalingam College of Engineering and Technology, Pollachi. The workshop aims to provide practical exposure to automated layout optimization methodologies and their relevance in modern VLSI design. The programme is scheduled to be held on 30 and 31 January 2026 at Venue C-426, focusing on enhancing industry-oriented design skills among students and the academic community.

Tech Talk – SILITTRON Association
The SILITTRON Association organized a Tech Talk for III Year Electronics Engineering (VLSI Design and Technology) students, providing a platform to explore emerging technologies and enhance technical communication skills. A total of 6 participants presented on various advanced topics, while around 60 students attended the event. The session encouraged knowledge sharing, discussion, and peer learning. The event was held on 5 November 2025 at NPT Hall – 12, from 9:00 AM to 4:30 PM, and concluded with a cash prize of ₹1000 awarded to the best performer.
workshop on Design Thinking in Analog and Digital Design Flow using Cadance EDA Tool
workshop on Design Thinking in Analog and Digital Design Flow using Cadance EDA Tool conducted for II year Electronics Engineering ( VLSI Design and Technology) students. The workshop bridges theoretical knowledge with practical design flow, covering both analog and digital aspects crucial for VLSI design. Design thinking fosters creativity in tackling design challenges.
3-Day Workshop on Analog and FPGA
The Department of Electronics Engineering - VLSI Design and Technology at Dr.Mahalingam College of Engineering and Technology, Pollachi, organized a three-day workshop on "Analog VLSI & FPGA: Design to Implementation" from October 6th to 8th, 2025.
Department Association “SILLITRON”, Electronics Engineering (VLSI Design and Technology)
The Department Association SILLITRON of Electronics Engineering (VLSI Design and Technology) conducted Techno Conference 2025, an institution-level technical conference that brought together students from ECE, EEE, VLSI, and ACT departments to present and discuss innovative ideas in IC Design, FPGA Design, 5G Communication, IoT & Embedded Systems, and Power Systems. The event witnessed active participation from 79 students across 26 teams, promoting technical collaboration and innovation.
Department Association SILITTRON
The Department of Electronics Engineering (VLSI Design and Technology), Dr. Mahalingam College of Engineering and Technology, Pollachi, proudly inaugurated its Department Association SILITTRON for the Academic Year 2025–2026 on 9th August 2025 (Saturday) at the EEE Seminar Hall from 1:00 pm to 4:00 pm.
Silitron Association
The Department of Electronics Engineering (VLSI Design & Technology) successfully organized the Valedictory Ceremony of the Silitron Association for the academic year 2024–2025 on 29th April 2025 at NPT Seminar Hall 12.



